| abstract |
An integrated circuit containing a PMOS transistor with p-channel source/drain (PSD) regions which include a three layer PSD stack containing Si—Ge, carbon and boron. The first PSD layer is Si—Ge and includes carbon at a density between 5×10 19 and 2×10 20 atoms/cm 3 . The second PSD layer is Si—Ge and includes carbon at a density between 5'310 19 atoms/cm 3 and 2×10 20 atoms/cm 3 and boron at a density above 5×10 19 atoms/cm 3 . The third PSD layer is silicon or Si—Ge, includes boron at a density above 5×10 19 atoms/cm 3 and is substantially free of carbon. After formation of the three layer epitaxial stack, the first PSD layer has a boron density less than 10 percent of the boron density in the second PSD layer. A process for forming an integrated circuit containing a PMOS transistor with a three layer PSD stack in PSD recesses. |