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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762
filingDate 1997-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1999-08-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_922e220d8b71b2f35158448031db1e70
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bdbcf1fcaf6daf5a9c83ede6e1aae7e6
publicationDate 1999-08-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-5937308-A
titleOfInvention Semiconductor trench isolation structure formed substantially within a single chamber
abstract A substantially in situ trench isolation process is provided. The process includes forming a trench regions between active regions in a semiconductor substrate. The semiconductor substrate may be covered with a protective oxide pad and/or nitride layer. In a single chamber, an oxide is thermally grown in the trench, the nitride layer is substantially stripped, and a fill dielectric is deposited in the trench and over the active and trench regions. The invention contemplates thermal growth, etch, and deposition processes to be performed serially in a single chamber without opening the chamber. The invention further contemplates modifying or adapting a conventional process chamber to all for the in situ processing of thermal growth, etch, and deposition processes. Alternatively, a specialized chamber may be provided.
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