http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5248350-A

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_893465b5a321f5491ad2e2fe60b0240b
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76221
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76
filingDate 1990-11-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1993-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_932c849da7f5b398fdd9de72e6fcc812
publicationDate 1993-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-5248350-A
titleOfInvention Structure for improving gate oxide integrity for a semiconductor formed by a recessed sealed sidewall field oxidation process
abstract A process for forming field oxide regions between active regions in a semiconductor substrate. Pad oxide, polysilicon and first silicon nitride layers are successively formed over substrate active regions. The first nitride layer, polysilicon layer, pad oxide layer and a portion of the substrate are then selectively etched to define field oxide regions with substantially vertical sidewalls. A second silicon nitride is provided on the substantially vertical sidewalls, and field oxide is grown in the field oxide regions. The first silicon nitride, polysilicon and pad oxide layers are then removed. The presence of the polysilicon layer prevents the formation of a sharp corner between the field oxide and active regions if an overetch occurs during the removal of the pad oxide layer.
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priorityDate 1990-11-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 53.