| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-13069 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02631
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78639
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78606
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05B44-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate |
2014-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2019-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21747acfb77b0d181ab4dff0d66658d4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_75c6267d8c775da162e94c833c3742ac
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10941373b6a864097266d70055b7c335
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9b2600ae93ec9dac7677dbd61b4f8e0e |
| publicationDate |
2019-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10326025-B2 |
| titleOfInvention |
Semiconductor device and manufacturing method thereof |
| abstract |
To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11715800-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11036324-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10910499-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11296120-B2 |
| priorityDate |
2008-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |