| abstract |
A semiconductor package, a method for manufacturing the same, and a semiconductor package structure including the same are provided. The method comprises preparing a parent substrate comprising a plurality of package board parts spaced apart laterally from each other, a first comprising at least one through-via electrode on each package board part. one chip is mounted, wherein the through-via electrodes are covered by rear surfaces of the first chips, forming a first mold film on the mother substrate having the first chips, and planarizing the first mold film exposing the rear surfaces of the first chips, etching the exposed rear surfaces of the first chips to thin the first chips and exposing the rear surfaces of the through-via electrodes, the planarized first mold layer , forming a passivation film on the etched rear surfaces of the first chips and the rear surfaces of the through-via electrodes, and selectively removing the passivation film on the rear surfaces of the through-via electrodes to the through-via electrode exposing their back surfaces. |