| abstract |
The present invention relates to a wafer system package structure and an electronic device, comprising: a substrate, formed with multiple first chips, the first chips grown using semiconductor processing; and an encapsulation layer, integrated with multiple second chips, the encapsulation layer covering the substrate and the first chips. At least one second chip is electrically connected to at least one first chip by means of a conductive bump, and the first chip and the second chip that are in electrical connection have an overlap portion. In the present invention, the wafer box and a system integration method are combined to obtain the advantages of multiple chips that are integrated and the case fabrication is completed on the substrate. |