| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-02372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06541
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76885 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76841
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53238 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-498
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 |
| filingDate |
2017-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2018-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0577ee7f8bbe3429908086153e54b781
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e0d536ba973ed2f64b587a580077816 |
| publicationDate |
2018-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9978666-B2 |
| titleOfInvention |
Method for fabrication semiconductor device with through-substrate via |
| abstract |
A method for is used for forming a semiconductor device. The method includes forming an ILD layer on a substrate and a buffer layer on the ILD layer, wherein at least one contact is formed in the ILD layer; forming an opening through the buffer layer, the ILD layer, and the substrate; forming a liner structure layer over the substrate, wherein an exposed surface of the opening is covered by the liner structure layer; depositing a conductive material over the substrate to fill the opening; performing a polishing process, to polish over the substrate and stop at the buffer layer, wherein the liner structure layer and the conductive material remaining in the opening form a conductive via; performing an etching back process, to remove the buffer layer and expose the ILD layer, wherein a top portion of the conductive via is also exposed and higher than the ILD layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11437374-B2 |
| priorityDate |
2015-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |