| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_eeddc1b6080dbee3242dd355846258d2 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0433 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-405
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-70
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0433 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-34 |
| filingDate |
2011-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49e8558da23c81271da0df0b95c7ea28 |
| publicationDate |
2014-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8687416-B2 |
| titleOfInvention |
Signal processing circuit comprising buffer memory device |
| abstract |
It is an object to provide a signal processing circuit for which a complex manufacturing process is not necessary and whose power consumption can be suppressed. In particular, it is an object to provide a signal processing circuit whose power consumption can be suppressed by stopping the power supply for a short time. The signal processing circuit includes a control circuit, an arithmetic unit, and a buffer memory device. The buffer memory device stores data sent from the main memory device or the arithmetic unit in accordance with an instruction from the control unit; the buffer memory device comprises a plurality of memory cells; and the memory cells each include a transistor including an oxide semiconductor in a channel formation region and a memory element to which charge whose amount depends on a value of the data is supplied via the transistor. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10971528-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11636883-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10522693-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11031506-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9093136-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11003986-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10658395-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10290720-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10197627-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11195836-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014211558-A1 |
| priorityDate |
2010-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |