| abstract |
A memory device and memory incorporating a plurality of the memory devices is described wherein each memory device has spaced apart source and drain regions, a channel, a barrier insulating layer, a nanocrystal or a plurality of nanocrystals, a control barrier layer, and a gate electrode. The nanocrystal which may be a quantum dot, stores one electron or hole or a discrete number of electrons or holes at room temperature to provide threshold voltage shifts in excess of the thermal voltage for each change in electron or hole stored. The invention utilizes Coulomb blockade in electrostatically coupling one or more stored electrons or holes to a channel while avoiding in-path Coulomb-blockade controlled conduction for sensing the stored charge. |