Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-485 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-77 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76237 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1211 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41791 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7851 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
filingDate |
2020-05-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d45e756830804a1f8a6b6cea3df47f83 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a8c02416e74ffd9d23d662b70bce757c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cee81f60116ffab4f246234b88e96a2c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c5c2b8d576416af9d10ccc49a72bae35 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_229f26fc17cf9764c6fc585a3030fcce |
publicationDate |
2020-08-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2020266101-A1 |
titleOfInvention |
Integrated circuit devices and method of manufacturing the same |
abstract |
An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration. |
priorityDate |
2018-05-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |