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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76229
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filingDate 2004-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7837f0a1f84b64f6439a6cd9e782c390
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publicationDate 2004-11-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2004227260-A1
titleOfInvention Semiconductor device using fuse/anti-fuse system and method of manufacturing the same
abstract A first concave portion for the element isolation, a second concave portion for an aligning mark, and a third concave portion for an anti-fuse portion are formed simultaneously within a silicon substrate. After a silicon oxide film is formed on the entire surface, the silicon oxide film positioned within the second and third concave portions is removed. Then, a gate insulating film is formed on the entire surface, followed by forming a polysilicon film on the gate insulating film. Further, these polysilicon film and gate insulating film are selectively removed to form a gate electrode above an element region, an aligning mark portion in the second concave portion, and a gate electrode for an anti-fuse portion on the bottom surface of the third concave portion.
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