http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20210117113-A

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filingDate 2020-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_129afe943068d4f66cc519747a0ddbd5
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publicationDate 2021-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20210117113-A
titleOfInvention Field plate and isolation structure for high voltage device
abstract The integrated chip includes a field plate overlying the isolation structure. A gate electrode overlies the substrate between the source region and the drain region. The etch stop layer extends laterally from the top surface of the gate electrode to the front surface of the substrate. An etch stop layer overlies the drift region disposed between the source and drain regions. The field plate is disposed in a first interlayer dielectric (ILD) layer overlying the substrate. The field plate extends from the top surface of the first ILD layer to the top surface of the etch stop layer. An isolation structure is disposed within the substrate and extends from the front surface of the substrate to a point below the front surface of the substrate. An isolation structure is laterally disposed between the gate electrode and the drain region.
priorityDate 2020-03-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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