| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bf83328d853bc7476ca10212837b3a01 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4933 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-402
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7823
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4933 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate |
2011-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_572dac2057b80e98c059444b8cdc2656
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_da3ec9aba2e9a03cad5c2c6556b83a59
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1926c37beab16233dfc3ba3fa15fb622 |
| publicationDate |
2013-04-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20130042417-A |
| titleOfInvention |
High voltage device |
| abstract |
PURPOSE: A high voltage device is provided to increase a switching speed by forming a gate in a gate region and making a field structure which surrounds a drain region. CONSTITUTION: A substrate includes a source region, a gate region, and a drain region. A source is formed in the source region. A gate is formed in the gate region. A drain is formed in the drain region. The drain region is surrounded by a field structure(160). The drain is separated from a second side of the gate. The source is adjacent to a first side of the gate. A device well(170) is arranged on the substrate. An inner device isolation region is formed on the substrate. An interconnection is formed in the field structure. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20210117113-A |
| priorityDate |
2011-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |