| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J2237-334
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32082
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-518 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31138
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0206
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4983
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0212
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate |
2013-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2016-03-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2016-03-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-101600738-B1 |
| titleOfInvention |
Method for reducing damage to low-k gate spacer during etching |
| abstract |
A method for performing a spacer etch process is described. The method includes providing a gate structure on a substrate having a low-k spacer material conformally applied on the gate structure and a spacer material from the gate structure and the substrate while maintaining the sidewall spacers positioned along the sidewalls of the gate structure And performing a spacer etch process sequence to partially remove the spacer etch process sequence. The spacer etch process sequence may include depositing a spacer protective layer on the exposed surface of the spacer material and selectively etching away the spacer protective layer and the spacer material to remove the sidewall spacers on the sidewalls of the gate structure , And while the spacer protection layer is partially or fully consumed by the one or more etch processes, it exhibits reduced compositional variation and / or dielectric constant. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20180056362-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102082443-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11393926-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11145762-B2 |
| priorityDate |
2012-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |