http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100713267-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66553 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66583 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4983 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-43 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 |
| filingDate | 2000-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2007-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2007-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100713267-B1 |
| titleOfInvention | Semiconductor device manufacturing method |
| abstract | The invention relates to a method of manufacturing a semiconductor device comprising a transistor having a gate (22) insulated from a channel (13) by a gate dielectric (17), wherein the channel (13) is a surface (2) of the semiconductor body (1). If provided in the active region 4 of the first conductivity type provided in the above, this is the length L beyond extending between the source region 11, 9 and the drain region 12, 9 of the second conductivity type. The active region 4 of the first conductivity type is defined in the same semiconductor 1, and a dielectric layer 14 is provided, which is provided with a recess in the region of the gate 22 intended to be provided in a subsequent step, The gate dielectric 17 of the transistor is formed. Thereafter, a first conductive layer and a second conductive layer are applied, the first conductive layer being relatively thin compared to the recess width, and the first conductive layer and the second conductive layer together form the gate 22 of the transistor. do. The gate includes a central portion 21 and sidewall portions 19 positioned along both sides of the central portion 21, the central portion 21 and the sidewall portions 190 being in contact with the gay dielectric 17 and the channel 13. The work function of the gate 22 which varies over the length L is set together. |
| priorityDate | 1999-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 47.