http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011211016-A

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filingDate 2010-03-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_078c57ea166f109dc7da977ca8320ab8
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publicationDate 2011-10-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2011211016-A
titleOfInvention Manufacturing method of semiconductor device
abstract The depth of trenches having different opening widths can be controlled even at a high aspect ratio, and an increase in process time can be suppressed. At the timing when a protective film is removed on the bottom surface of a trench 33 having the Nth width (where N is an integer less than M) among a plurality of M types of trenches 33 having different widths during the etching step. At the same time, the reaction is performed so that the etching amount of silicon on the bottom surface of the Nth trench 33 becomes equal to or more than the etching amount of silicon on the bottom surface of the (N + 1) th narrowest trench 33 within the remaining time of the etching step. The energy value of incident ions in reactive ion etching is set. [Selection] Figure 3
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2013168372-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013120800-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017143194-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017005151-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013254936-A
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Total number of triples: 26.