http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003502835-A
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66553 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4983 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66583 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28105 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-43 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 |
| filingDate | 2000-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2003-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2003502835-A |
| titleOfInvention | Method for manufacturing semiconductor device |
| abstract | Abstract: A transistor having a gate (22) insulated from a channel (13) by a gate dielectric layer (17), wherein the channel (13) is provided on a surface (2) of a semiconductor body (1). A semiconductor device provided in the active region of the second conductivity type (4) and extending over a length L between the source zone (11, 9) and the drain zone (12, 9) of the second conductivity type. In the manufacturing method, a first conductive type active region (4) is formed in a semiconductor body (1), and a dielectric layer (a concave portion is provided in a region of a gate (22) to be provided in a later step). 14), an insulating layer is formed in the recess, and a gate dielectric layer (17) of the transistor is formed. Next, a first conductive layer and a second conductive layer are formed. The first conductive layer is relatively thin compared to the width of the recess, and the first and second conductive layers together form the gate (22) of the transistor and fill the recess in the dielectric layer (14). The gate includes a central portion (21) and side edge portions (19) located along opposite sides of the central portion (21), wherein the central portion (21) and the side edge portion (19) are formed by a gate dielectric layer (19). 17) and together determine the work function of the gate (22) which varies over the length L of the channel (13). |
| priorityDate | 1999-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 43.