| abstract |
A semiconductor device has a gate structure arranged over a channel region and a source / drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function matching material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function matching material layers. The one or more work function adjustment material layers have an aluminum-containing layer, a diffusion barrier layer being arranged at least on a lower portion and / or an upper portion of the aluminum-containing layer. The diffusion barrier layer is one or more from the group comprising a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer. |