| abstract |
Embodiments of the present application relate to printed repassivation for wafer chip scale packaging. The described examples provide integrated circuits and methods (200) comprising: forming (208) a conductive seed layer (124) at least partially over conductive features (119) of a wafer (120); forming (214) a conductive structure (126) on at least a portion of 124); performing (220) a printing process (800) proximate the side of the conductive structure (126) on the side of the wafer (120) forming a polymeric material (128); curing (220, 224) the deposited polymeric material (128); and attaching a solder ball structure (130) to the sides of the conductive structure (126). |