http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2072264-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2b8b744d430e252fa21c14c2b8dee176 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-949 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S148-15 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66757 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78624 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78621 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78675 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02686 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02422 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-027 |
| filingDate | 1992-06-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4f585957bb375e5ebbd94ad0aab6e1e2 |
| publicationDate | 1992-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CA-2072264-A1 |
| titleOfInvention | Thin-film transistor manufacture |
| abstract | ABSTRACT THIN-FILM TRANSISTOR MANUFACTURE Source (51) and drain (52) of a thin-film transistor (TFT) are formed from a conductive layer (5) using a photolithographic step (Figure 3) in which the gate (4) serves as a photomask. In accordance with the invention the insulated gate structure (3,4) is formed at the upper face of the channel-forming semiconductor film (2), i.e. remote from the transparent substrate (1). The semiconductor film (2) may be annealed to high-mobility polycrystalline material before depositing the gate structure (3,4) and the overlying conductive layer (5). In this way, high speed TFTs can be formed due to a combination of low gate-to-drain and gate-to-source capacitances and the provision of the transistor channel in the high quality semiconductor material adjacent to the upper face of the film (2). Preferably ultra-violet radiation (20: Figure 1) is used for the annealing with an absorption depth less than the thickness of the film (2) so that the film-substrate interface is not heated which otherwise may weaken the adhesion of the film (2) to the substrate (1). By using an angled exposure in a photolithographic and etching step with the gate (4) as a shadow photomask, a low-doped drain part can be defined from a conductive layer (5) comprising highly-doped material on low-doped material. This low-doped drain part reduces the effect of high drain bias in operation of the TFT. (Figures 1,3 & 4). |
| priorityDate | 1991-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 35.