| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7e7817270f9a678beee530d44bd0a472 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-0491 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2889
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2884
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2868
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2896
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K7-20272
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2887
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-275
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2867 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-67
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L25-00 |
| filingDate |
2019-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b54927a3b61285dc3cbf98a51d8f5bc7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fb4d6dcf616c68c3b8814109ae8b8a16 |
| publicationDate |
2020-02-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2020033335-A1 |
| titleOfInvention |
Apparatus and method for testing semiconductor devices |
| abstract |
The invention is a test system for testing silicon wafers or packaged devices. The system includes a tester having multiple testing stacks that each hold a vertical stack of test engines, data buffers, pin drivers, and other resources, which are electrically connected on one side to a wafer or DUT and on the other side to a test host computer via fast data links. Each testing stack is disposed on a top side of a wafer contactor electrically connected to a wafer or a load board electrically connected to a DUT. The system includes a cooling system to remove heat during operation. The system minimizes the data signal path between the pads of the devices being tested and the pin drivers of the tester, the test engines, and the test host computer. High performance is possible by the connection of bottom of each testing stack directly to the wafer contactor. |
| priorityDate |
2018-08-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |