http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2018195417-A1
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_716ced455c5edbe3e93066825dc8d4ef |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76883 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311 |
filingDate | 2018-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d2b27c94eac6f1b05f687d153f0abd04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_44eece8d977c6f3fd216a73a0397130d |
publicationDate | 2018-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | WO-2018195417-A1 |
titleOfInvention | Self-aligned contact and gate process flow |
abstract | Processing methods may be performed to form semiconductor structures that may include self-aligned gate and self-aligned contact structures. The methods may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a processing chamber. The methods may include contacting a semiconductor substrate with effluents of the plasma. The semiconductor substrate may be housed in a processing region of the processing chamber. The methods may include selectively etching a metal gate material below a height of exposed regions of a gate spacer and a contact dielectric on the semiconductor substrate. The methods may further include subsequently depositing a cap material over the metal gate material. The cap material may be selectively deposited on the metal gate material relative to exposed regions of the gate spacer and the contact dielectric. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2021091684-A1 |
priorityDate | 2017-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 60.