| abstract |
A semiconductor chip in this invention has a plurality of solder-containing electrodes on an element formation surface of a main chip body. A package substrate has one or more electrically-conductive layers and a solder resist layer on the surface of a main substrate body. The solder resist layer is provided as a continuous layer above the surface of the main substrate body and the one or more electrically-conductive layers and has one or more openings above the respective electrically-conductive layers. The plurality of solder-containing electrodes include two or more first electrodes that share a function other than the supply of power. The one or more electrically-conductive layers include a continuous first electrically-conductive layer. The two or more first electrodes are connected to the continuous first electrically-conductive layer. At least one opening is provided so as to correspond to each of the two or more first electrodes. |