| abstract |
Methods and apparatus to protect fragile dielectric layers in a semiconductor chip are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first polymer layer (105) over a conductor pad (60) of a semiconductor chip (15) where the conductor pad (60) has a first lateral dimension (X 1 ). An underbump metallization structure (55) is formed on the first polymer layer (105) and in ohmic contact with the conductor pad (60). The underbump metallization structure (55) has a second lateral dimension (X 2 ) greater than the first lateral dimension (X 1 ). A second polymer layer (130) is formed on the first polymer layer (105) with a first opening (135) exposing at least a portion of the underbump metallization structure (55). |