| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_af9dfd351129d10161948eede6a3c046
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8b79b8ddfb59e5657df050f8998d1d33
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c1c3c142616a68dc55fc87e407e04d15 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5389
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3735
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-072
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-56
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-4334
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-433
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-373
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3135
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-07 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L25-07
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-373
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-433 |
| filingDate |
2007-10-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bb56bc609f85e266502d758de7f312fa
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ede7fdd6d918fff80d7322ae2ecd3367 |
| publicationDate |
2008-04-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2008045416-A1 |
| titleOfInvention |
High temperature, high voltage sic void-less electronic package |
| abstract |
An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between -550°C to 3000°C. The present invention can also tolerate continuous operation at 3000°C, due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold. |
| priorityDate |
2006-10-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |