| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-485 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76825
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76838
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2016-12-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ccc4374d156cc3a0d98347b4d73bd338
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_716c452918c363ac1c58d95f1c12110d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cc6ad7531e193e5705039c59a94edd7c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4a2300ea576ccb2814c1c0334e665c2c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b644c92132b8b8723219e416cf7c3e0a |
| publicationDate |
2017-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9847290-B1 |
| titleOfInvention |
Through-silicon via with improved substrate contact for reduced through-silicon via (TSV) capacitance variability |
| abstract |
The present disclosure relates to semiconductor structures and, more particularly, to Through-Silicon Via (TSV) structures with improved substrate contact and methods of manufacture. The structure includes: a substrate of a first species type; a layer of different species type on the substrate; a through substrate via formed through the substrate and comprising an insulator sidewall and conductive fill material; a second species type adjacent the through substrate via; a first contact in electrical contact with the layer of different species type; and a second contact in electrical contact with the conductive fill material of the through substrate via. |
| priorityDate |
2016-12-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |