| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b57d58003c0724b02106188182a7465e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4908
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1288
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32135
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-14 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66 |
| filingDate |
2017-04-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f3e29df76f7f7df358ca856c5c20aca3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bd2d30516e21b485f64146a321e1abda
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6e8a19d8031824e29c7ed8a23d13ab44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_78420da8cbdd6b3f74052046242a4df0 |
| publicationDate |
2017-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9837513-B2 |
| titleOfInvention |
Semiconductor device and manufacturing method thereof |
| abstract |
When a transistor having bottom gate bottom contact structure is manufactured, for example, a conductive layer constituting a source and a drain has a three-layer structure and two-step etching is performed. In the first etching process, an etching method in which the etching rates for at least the second film and the third film are high is employed, and the first etching process is performed until at least the first film is exposed. In the second etching process, an etching method in which the etching rate for the first film is higher than that in the first etching process and the etching rate for a “layer provided below and in contact with the first film” is lower than that in the first etching process is employed. The side wall of the second film is slightly etched when a resist mask is removed after the second etching process. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11437500-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10347769-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11217699-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10468506-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10923580-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10134879-B2 |
| priorityDate |
2010-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |