| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_827f58bacb8fef905977e1f8b3c7aace |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0878
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2253
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66712
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823493
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823487 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-265
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-82
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-266 |
| filingDate |
2017-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_57bba3148f0cd6499fafbf25907ad8d0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77236ea5a18ba5ef021ca0637b0ff0ba |
| publicationDate |
2017-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9837320-B2 |
| titleOfInvention |
MOSFET devices with asymmetric structural configurations introducing different electrical characteristics |
| abstract |
First and second transistors with different electrical characteristics are supported by a substrate having a first-type dopant. The first transistor includes a well region within the substrate having the first-type dopant, a first body region within the well region having a second-type dopant and a first source region within the first body region and laterally offset from the well region by a first channel. The second transistor includes a second body region within the semiconductor substrate layer having the second-type dopant and a second source region within the second body region and laterally offset from material of the substrate by a second channel having a length greater than the length of the first channel. A gate region extends over portions of the first and second body regions for the first and second channels, respectively. |
| priorityDate |
2015-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |