| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_099413ae0cf5a2b6398b5151766cd260 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78603
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76879
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-123
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2015-11-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a927bccc01b15fa4b5ed9afbfa0b9358 |
| publicationDate |
2017-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9805975-B2 |
| titleOfInvention |
Thin-film transistor array substrate including gate-underlying stepped layer and etch-stopper, and organic light emitting display including the same |
| abstract |
A thin-film transistor (TFT) array substrate includes a substrate, a gate-underlying stepped layer disposed on the substrate, a gate electrode disposed on the gate-underlying stepped layer, a semiconductor layer formed over the gate electrode, and an etch-stopper disposed on the semiconductor layer. The gate-underlying stepped layer is formed under the gate electrode and has a width greater than a width of the gate electrode. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11430846-B2 |
| priorityDate |
2015-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |