| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b6caea61bfde8a45e01a8deabff80d97 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02255
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02252 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-511
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02598
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-518
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11582
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11573
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0217 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11582
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11573
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51 |
| filingDate |
2016-05-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-07-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0834aad75b15c80712e292d30a38de62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f95e9c19938726065a294e24b40e6aea
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5507db047e1dd16646df764651703948 |
| publicationDate |
2017-07-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9711530-B1 |
| titleOfInvention |
Locally-trap-characteristic-enhanced charge trap layer for three-dimensional memory structures |
| abstract |
Threshold voltage shift due to programming of a neighboring memory element can be reduced or suppressed by forming a compositionally modulated charge storage layer in a three-dimensional memory device. The compositionally modulated charge storage layer can be formed by providing an oxygen-containing dielectric silicon compound layer outside a tunneling dielectric layer, and subsequently nitriding portions of the oxygen-containing dielectric silicon compound layer only at levels of the control gate electrodes. An alternating stack of sacrificial material layers and insulating layers can be employed to form a memory stack structure therethrough. After removal of the sacrificial material layers, a nitridation process can be performed to convert physically exposed portions of the oxygen-containing dielectric silicon compound layer into silicon nitride portions, which are vertically spaced from one another by remaining oxygen-containing dielectric silicon compound portions that have inferior charge trapping property to the silicon nitride portions. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018247944-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111312720-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11114462-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11695050-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10811425-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112635475-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9892930-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10872901-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109244076-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10516025-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11101289-B1 |
| priorityDate |
2016-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |