| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2dcebf5a7f7ddc3b081f70e8ce1c4097
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_099413ae0cf5a2b6398b5151766cd260 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-14 |
| filingDate |
2014-02-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-01-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b219e50bc9e5ff57f01a67425e6701da
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e0d27baa4efcda76b0692017ee6a5a07
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_936c9ea71a83b24c5f83805b3d7b5a6f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bcf5383f424f671ae2c9d457bfc39aa0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3c09ae96e5b77a579cf500a9261a12f6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_824a235640d36354049e68391403e1e0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_75b1318f2f7c7baeb9635bf314d0a304
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d896ddcfaa48f885238b837c2cc8db78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0b24fb971c0544748f5610c7c5948b8f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4ae2882238c47615915f2f9a7d57dcfc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ef886684cccd0924e53e77a89b42deed
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e6bdb2c306ca873238314eeb7fc3c41 |
| publicationDate |
2017-01-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9553201-B2 |
| titleOfInvention |
Thin film transistor, thin film transistor array panel, and manufacturing method of thin film transistor |
| abstract |
The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016359051-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10483404-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11424368-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10845911-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10741695-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10032926-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9825057-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10199394-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015153599-A1 |
| priorityDate |
2012-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |