Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0466 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-70 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1207 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-60 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-24 |
filingDate |
2015-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2016-10-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8bb761a089dba691e10fe050a316ea73 |
publicationDate |
2016-10-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9461067-B2 |
titleOfInvention |
Semiconductor device |
abstract |
An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode. A portion of a side surface of the semiconductor layer having the channel formation region and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other when seen from a planar direction. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017018560-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10074663-B2 |
priorityDate |
2010-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |