Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f56b5174f7d196258707ccf1d609796e |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-485 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76801 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7684 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-315 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-09 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-0335 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-10814 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-10855 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4175 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-10894 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76883 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 |
filingDate |
2014-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2016-04-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_07d2baf761527992ebef9deb7791bd6f |
publicationDate |
2016-04-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9305925-B2 |
titleOfInvention |
Semiconductor integrated circuit device and manufacturing method thereof |
abstract |
In order to achieve high-speed operation of an eDRAM, the eDRAM includes: a selection MISFET having a gate electrode that serves as a word line, a source region, and a drain region; a source plug electrode coupled to the source region; and a drain plug electrode coupled to the drain region DR 1 . The eDRAM further includes: a capacitive plug electrode coupled to the drain plug electrode; a bit line coupled to the source plug electrode; a stopper film covering the bit line; and a capacitive element that is formed over the stopper film and has a first electrode, a dielectric film, and a second electrode. The first electrode is coupled to the capacitive plug electrode, and the height of the capacitive plug electrode and that of the bit line are equal to each other. |
priorityDate |
2013-11-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |