| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_200bdb0c4b6943667cc7acc649633d56 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-005 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C14-0054
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C14-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C14-0009
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-00 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-06 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C14-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-00 |
| filingDate |
2012-02-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-07-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_661ec98136533a26627996934183340d |
| publicationDate |
2014-07-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8787083-B2 |
| titleOfInvention |
Memory circuit |
| abstract |
While the supply of power is stopped, a data signal that has been held in a volatile memory section can be held in a nonvolatile memory section. In the nonvolatile memory section, a transistor having an extremely low off-state current allows a data signal to be held in the capacitor for a long period of time. Thus, the nonvolatile memory section can hold the logic state even while the supply of power is stopped. When the supply of power is started again, the data signal that has been held in the capacitor while the supply of power has been stopped is set at such a potential that malfunction does not occur by turning on the reset circuit. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10090023-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102044725-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015016179-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20140144238-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9507366-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9064599-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013261835-A1 |
| priorityDate |
2011-02-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |