| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06541
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16146
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-131
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-0557
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00014
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13025
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13009
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-0401 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K7-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5384 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40 |
| filingDate |
2013-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-05-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_14e03c3085437bf8a97788c5a5877ea6 |
| publicationDate |
2014-05-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8736028-B2 |
| titleOfInvention |
Semiconductor device structures and printed circuit boards comprising semiconductor devices |
| abstract |
The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9768066-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015380310-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10553487-B2 |
| priorityDate |
2005-09-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |