| abstract |
A storage element capable of retaining data even after supply of power supply voltage is stopped is provided. In the storage element retaining data in synchronization with a clock signal, with the use of a capacitor and a transistor having a channel in an oxide semiconductor layer, the data can be retained even after supply of power supply voltage is stopped. Here, when the transistor is turned off while the level of the clock signal is kept constant before the supply of power supply voltage is stopped, the data can be retained accurately in the capacitor. By applying such a storage element to each of a CPU, a memory, and a peripheral control device, supply of power supply voltage can be stopped in the entire system, so that the power consumption of the entire system can be reduced. |