| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8b80a87c347ca3d4832d4403a2763e35
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_33f57ca919ee24575a908081b0c96aef
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f8d6a676395f791f984ec5352968b6c3 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-52
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T117-1092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-546
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02P70-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-547 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-022425
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-02363
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-0236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-1892
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0657
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-035281
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-056
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-068
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-1804
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-182
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-045 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-0236 |
| filingDate |
2012-01-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ab7f6716d53fd6f3ad92f8b059930c2e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d3274ee138157a128fc328537c987171 |
| publicationDate |
2014-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8664737-B2 |
| titleOfInvention |
Three-dimensional semiconductor template for making high efficiency thin-film solar cells |
| abstract |
A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9590035-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015061086-A1 |
| priorityDate |
2008-11-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |