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filingDate 2012-09-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2013-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f07100d5c435c2a552c1fec30c84e01d
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publicationDate 2013-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8517798-B2
titleOfInvention Polishing pad, method of producing the same and method of producing semiconductor device by using the same
abstract The present invention provides a polishing pad used for planarizing inter layer dielectrics and the like by CMP (chemical mechanical polishing) in the manufacturing process of a semiconductor device, a method of producing the polishing pad and a method of producing a semiconductor device by using the polishing pad. The present invention relates to a semiconductor wafer polishing pad having grooves in a polishing surface and formed from a foamed polyurethane, wherein a processed surface of the groove comprising a side surface and a bottom surface has a surface roughness Ra of not more than 10.
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