Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bf83328d853bc7476ca10212837b3a01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d5d55e614d489453155332828bb0b764 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f9f962c94ae2630cb864e6dd47729af5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_34225efda15eac8fc4589ad7c437a3d7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0cefc2c80de26a230a1a131227dd9c61 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b579d2acd5ce9df2a7b96537a7e12b19 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_feaabcf214c3a39c9306a1b3568f1681 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823878 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823871 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-44 |
filingDate |
2011-06-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2012-08-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2c976ba5275f0e8897439e3ced1223cd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a0a1a44653ac3ce7bffc1b333ae20f7d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f8a727143d3f8081715dd009b2890f39 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8ed53c753c1e0a6ea713a8106bff0134 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ce112050c2787b31c92b8326c247eb20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_44e89ccbe62239fe087e4e853fb2a0b7 |
publicationDate |
2012-08-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-8236688-B2 |
titleOfInvention |
Integrated circuit system with through silicon via and method of manufacture thereof |
abstract |
A method of manufacture of an integrated circuit system includes: providing a substrate including an active device; forming a through-silicon-via into the substrate; forming an insulation layer over the through-silicon-via to protect the through-silicon-via; forming a contact to the active device after forming the insulation layer; and removing the insulation layer. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9355935-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8803292-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10049965-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9123702-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10504776-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8697483-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9418923-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11545392-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10784162-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8575725-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10115634-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011080184-A1 |
priorityDate |
2009-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |