| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2885
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-288
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53233 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-288
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-52
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 |
| filingDate |
2001-11-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2010-04-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_510db7dcfae2d177a05fb1a1116f53a7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2451cf2bc73ff8a653c6f9cf69f78b50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f40179dc78659f381d80efa5a27fb3f3 |
| publicationDate |
2010-04-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-7696092-B2 |
| titleOfInvention |
Method of using ternary copper alloy to obtain a low resistance and large grain size interconnect |
| abstract |
A method of fabricating an integrated circuit includes forming a barrier layer along lateral side walls and a bottom of a via aperture and providing a ternary copper alloy via material in the via aperture to form a via. The via aperture is configured to receive the ternary copper alloy via material and electrically connect a first conductive layer and a second conductive layer. The ternary copper alloy via material helps the via to have a lower resistance and an increased grain size with staffed grain boundaries. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11538916-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9304143-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013282325-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9431343-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022069100-A1 |
| priorityDate |
2001-11-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |