| abstract |
An interlayer insulation film is deposited on a substrate in which a semiconductor element has been formed. A wiring groove is formed in the interlayer insulation film. A barrier layer, made of a material which prevents the diffusion of Cu atoms, is formed on at least the inner surface of the wring groove and the upper surface of the interlayer insulation film. A seed layer, made of Cu which contains an impurity, -is deposited on the barrier layer. By way of plating, a conductive layer made of Cu is deposited on the seed layer so as to fill the wiring groove. The substrate is heated to precipitate the impurity, contained in the seed layer, on at least an interface between the seed layer and the barrier layer. The conductive layer, the seed layer and the barrier layer are removed until the upper surface of the interlayer insulation film appears, thus performing surface planarization. A method for forming a Cu wiring whose adhesion to the underlying surface is high and whose electromigration resistance is excellent, is attained employing a plating process. |