http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7199043-B2

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filingDate 2003-12-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2007-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b6542ff4ac001729299192d621a5a427
publicationDate 2007-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-7199043-B2
titleOfInvention Method of forming copper wiring in semiconductor device
abstract Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper layer is polished by means of a chemical mechanical polishing process to form a copper wiring within a damascene pattern. At this time, the chemical mechanical polishing process is overly performed so that the top surface of the copper wiring is concaved and is lower than the surface of the interlayer insulating film of the low dielectric constant neighboring it. Furthermore, an annealing process is performed so that the top surface of the copper wiring is changed from the concaved shape to a convex shape while stabilizing the copper wiring. A copper anti-diffusion insulating film is then formed on the entire structure including the top surface of the copper wiring having the convex shape. As such, the copper anti-diffusion insulating film is formed not only within the damascene pattern but also on the entire structure, thus serving as a barrier to prohibit electro-migration and stress migration of copper. It is thus possible to improve reliability of the wiring. In addition, the entire surface including the top surface of the copper wiring is polished without a step to facilitate a photolithography process, an etch process, etc. that are subsequently performed. It is therefore possible to improve reliability in process.
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