| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36d1d9c59848bff6ad5f55923d1290f5 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40117
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B69-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7923
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42352
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26586
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66833
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66583
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 |
| filingDate |
2003-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2005-03-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b97d8ebdd5f45d8347959611f8e714e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8faf46099e6829101098e337b07546dd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2dc83603156ea3119308d9632b4ac94e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1c6e2a804b6f943f965324a41d3ef66e |
| publicationDate |
2005-03-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-6867455-B2 |
| titleOfInvention |
Semiconductor device with a metal insulator semiconductor transistor |
| abstract |
A semiconductor device capable of holding multibit information in one memory cell, and a method of manufacturing the semiconductor device. A trench is formed in a channel portion of an MONOS transistor. Then, a source side portion and a drain side portion in a silicon nitride film of a gate insulating film which interpose the trench are caused to function as first and second electric charge holding portions capable of holding electric charges. In the case in which first electric charges are trapped on the drain side and second electric charges are trapped on the source side, a portion of a gate electrode in the trench functions as a shield. If a fixed potential is given to the gate electrode, the second electric charge holding portion is not influenced by an electric field induced by the first electric charges so that the trapping of the second electric charges is not inhibited. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009020799-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2006192249-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7292478-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007063268-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010221876-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8168492-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004104425-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8357965-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7442989-B2 |
| priorityDate |
2002-06-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |