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filingDate 1999-07-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2003-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2003-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-6660636-B1
titleOfInvention Highly selective and complete interconnect metal line and via/contact hole filling by electroless plating
abstract A novel method for the activation of semiconductor substrates for highly selective electroless copper plating in multilayer interconnect metallization lines and vias/contact holes has been developed. A copper-seeded polysilicon layer is provided over the substrate to facilitate growth of copper into the vias. Subsequent rinsing and chemical-mechanical polishing processes allow removal of overgrowth of copper and the polysilicon layer to achieve overall smooth topography of the copper surface and the insulating layer surface of the substrate.
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