| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-485
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-482 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-485
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 |
| filingDate |
2000-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2003-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1214fc40849969c28f4aed5ee10a538b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eeadd0a8f3eab7acc3459e4f81f0e2c8 |
| publicationDate |
2003-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-6531395-B1 |
| titleOfInvention |
Method for fabricating bitlines |
| abstract |
The invention provides a method for fabricating bitlines, including the following steps: providing a semiconductor substrate having a contact opening, which opening exposed a diffusion region in the substrate or a polysilicon layer of a wordline; forming a polysilicon layer to cover the opening and contacting the exposed surface of the diffusion region or the polysilicon layer of the wordline; forming a tungsten silicide layer to cover the polysilicon layer; performing a ion implantation step with high energy and high dosage to damage a contact surface between the bitline and the wordline or a contact surface between the bitline and the diffusion region; forming a better contact surface between the bitline and the wordline or a better contact surface between the bitline and the diffusion region using thermal annealing in the subsequent steps, thereby reducing contact resistance between the bitline and the wordline or between the bitline and the diffusion region. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010314698-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7268065-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007284678-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8791528-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010273324-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7781316-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2005280118-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8202799-B2 |
| priorityDate |
2000-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |