| abstract |
A hydrogen barrier encapsulation technique for the control of hydrogen induced degradation of ferroelectric capacitors in non-volatile integrated circuit memory devices. The resultant device structure ameliorates the hydrogen induced degradation of ferroelectric capacitors by completely encapsulating the capacitor within a suitable hydrogen barrier material, such as chemical vapor deposition (“CVD”) or sputtered silicon nitride, thus ensuring process compatibility with industry standard process steps. Although the deposition process for CVD Si 3 N 4 itself contains hydrogen, the deposition time may be kept relatively short thereby allowing the TiN local interconnect layer to act as a “short term” hydrogen barrier. The techniques of the present invention are applicable to all known ferroelectric dielectrics including Perovskites and layered Perovskites (whether doped or undoped) including PZT, PLZT, BST, SBT and others while simultaneously allowing for a potentially broader choice of electrode materials and the use of a forming gas anneal process step on the completed IC structure. |