| abstract |
A multilevel interconnect structure for use in a semiconductor device including a lower metal wiring which is formed by selectively etching a stack of an aluminum alloy film deposited on a silicon substrate via an underlying insulating film and a TiW film deposited on the aluminum alloy film, an interlayer insulating film deposited on the lower metal wiring, a via hole formed in the interlayer insulating film such that the aluminum alloy film of the lower metal wiring is exposed in a bottom of the via hole, a plug made of aluminum and formed in the via hole such that a lower end of the plug is directly contacted with the aluminum alloy film of the lower metal wiring, and an upper metal wiring having an aluminum alloy film formed on the interlayer insulating film such that an upper end of the plug is directly contacted with the aluminum alloy film of the upper metal wiring. Since the upper and lower metal wirings are electrically connected to each other via interfaces of aluminum-aluminum alloy, the via resistance can be decreased and the electromigration reliability can be improved. |