Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02252 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-1063 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76883 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3086 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0337 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76837 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76813 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-308 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
filingDate |
2021-12-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_abd479e1a7f8574d0cf755cf5ed0e85e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4f9c0fad56061cfa609480b42a4dcb49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e8c4dea73cf52cd40a30ac572c2fa567 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bf8a734a36882d6133b6ba4ed6d3f2a6 |
publicationDate |
2022-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2022102207-A1 |
titleOfInvention |
Bottom-up fill dielectric materials for semiconductor structure fabrication and their methods of fabrication |
abstract |
Bottom-up fill dielectric materials for semiconductor structure fabrication, and methods of fabricating bottom-up fill dielectric materials for semiconductor structure fabrication, are described. In an example, a method of fabricating a dielectric material for semiconductor structure fabrication includes forming a trench in a material layer above a substrate. A blocking layer is formed partially into the trench along upper portions of sidewalls of the trench. A dielectric layer is formed filling a bottom portion of the trench with a dielectric material up to the blocking layer. The blocking layer is removed. The forming the blocking layer, the forming the dielectric layer, and the removing the blocking layer are repeated until the trench is completely filled with the dielectric material. |
priorityDate |
2016-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |