| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31111
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0206
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5283
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B61-22 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76846
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49838
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02063
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76804
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76826
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N50-80
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N50-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311 |
| filingDate |
2019-04-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_75ea5f8a196036022aa92cdb730fae20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b059ab4e986d7b03084c97f65ff4abe0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0005b41ea1651b6594b5db4aabb0c0be |
| publicationDate |
2020-03-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2020090944-A1 |
| titleOfInvention |
Semiconductor devices |
| abstract |
A semiconductor device includes a conductive structure on a substrate, an etch stop layer on the conductive structure, an insulation layer on the etch stop layer, and a contact plug extending through the etch stop layer and the insulation layer and contacting the conductive structure. The contact plug may include first and second conductive pattern structures sequentially stacked and contacting with each other. A width of an upper surface of the first conductive pattern structure may be greater than that of a lower surface of the second conductive pattern structure. At least an upper portion of the first conductive pattern structure may have a sidewall not perpendicular but inclined to an upper surface of the substrate. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11189639-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11476365-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022227390-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113629003-A |
| priorityDate |
2018-09-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |