Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8ff538ed094988386084565bc7f62aeb |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0433 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11556 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0425 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-35 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42344 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11521 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11519 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11526 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7883 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11556 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11526 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11521 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11519 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-12 |
filingDate |
2017-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_05171e3fc36e1704b0b9e32dd9751506 |
publicationDate |
2018-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2018033487-A1 |
titleOfInvention |
Non-volatile memory with floating gate having protruding portion |
abstract |
A memory cell includes a source region and a drain region disposed in a semiconductor body. A channel region is disposed in the semiconductor body between the source region and the drain region. A floating gate is disposed between the semiconductor body and the control gate. The floating gate includes a protruding portion that is located over the channel region between the source and drain regions and spaced therefrom. The protruding portion is separated from the channel region by a first insulating layer that is thinner than a second insulating layer that separates remaining portions of the floating gate from the channel region. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10727239-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11696438-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019088665-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10679699-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11031082-B2 |
priorityDate |
2016-07-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |